Thin Sempron

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History and features
The first Sempron CPUs were based on the Athlon XP architecture using the Thoroughbred or Thorton core. These models were equipped with the Socket A interface, 256 KiB L2 cache and 166 MHz Front side bus (FSB 333). Thoroughbred cores natively had 256 KiB L2 cache, but Thortons had 512 KiB L2 cache, half of which was disabled and could sometimes be reactivated with a slight physical modification to the chip. Later, AMD introduced the Sempron 3000+ CPU, based on the Barton core with 512 KiB L2 cache. From a hardware and user standpoint, the Socket A Sempron CPUs were essentially identical to Athlon XP desktop CPUs with a new brand name. AMD has ceased production of all Socket A Sempron CPUs.
The second generation (Paris/Palermo core) was based on the architecture of the Socket 754 Athlon 64. Some differences from Athlon 64 processors include a reduced cache size (either 128 or 256 KiB L2), and the absence of AMD64 support in earlier models. Apart from these differences, the Socket 754 Sempron CPUs share most features with the more powerful Athlon 64, including an integrated (on-die) memory controller, the HyperTransport link, and AMD's "NX bit" feature.
In the second half of 2005, AMD added 64-bit support (AMD64) to the Sempron line. Some journalists (but not AMD) often refer to this revision of chips as "Sempron 64" to distinguish it from the previous revision. AMD's intent in releasing 64-bit entry-level processors was to extend the market for 64-bit processors, which at the time of Sempron 64's first release, was a niche market.
In 2006, AMD announced the Socket AM2 and Socket S1 line of Sempron processors. These are functionally equivalent to the previous generation, except they have a dual-channel DDR2 SDRAM memory controller which replaces the single-channel DDR SDRAM version.

The TDP of the standard version remains at 62 W (watts), while the new "Energy Efficient Small Form Factor" version has a reduced 35 W TDP. The Socket AM2 version also does not require a minimum voltage of 1.1 volts to operate, whereas all socket 754 Semprons with Cool'n'Quiet did. In 2006, AMD was selling both Socket 754 and Socket AM2 Sempron CPUs concurrently. In the middle of 2007 AMD appears to have dropped the 754 line and is shipping AM2 and S1 Semprons.
AMD Sempron processor family
Logo
Desktop
Logo
Laptop
Code-named
Core
Date released
Code-named
Core
Date released
Thoroughbred
Thorton
Barton
Paris
Palermo
Manila
130 nm
130 nm
130 nm
130 nm
90 nm
90 nm
Jul 2004
Aug 2004
Sep 2004
Jul 2004
Aug 2004
May 2006
Dublin
Georgetown
Sonora
Albany
Roma
Keene
130 nm
130 nm
90 nm
90 nm
90 nm
90 nm
Jul 2004
May 2005
Nov 2004
Jul 2005
Jul 2005
May 2006
Sparta
Brisbane
Sargas
65 nm
65 nm
45 nm
Aug 2007
Mar 2008
July 2009
Sherman
Sable
Huron
65 nm
65 nm
65 nm
May 2007
Jun 2008
Jan 2009
List of AMD Sempron microprocessors
Models for Socket A (Socket 462)
Sempron 2800+ (Thoroughbred)
Sempron 3000+ (Barton)
Thoroughbred B/Thorton (130 nm)
L1-Cache: 64 + 64 KiB (Data + Instructions)
L2-Cache: 256 KiB, fullspeed
MMX, 3DNow!, SSE
Socket A (EV6)
Front side bus: 166 MHz (FSB 333)
VCore: 1.6 V
First release: July 28, 2004
Clockrate: 1500 MHz 2000 MHz (2200+ to 2800+)
Barton (130 nm)
L1-Cache: 64 + 64 KiB (Data + Instructions)
L2-Cache: 512 KiB, fullspeed
MMX, 3DNow!, SSE
Socket A (EV6)
Front side bus: 166 MHz 200 MHz (FSB 333 400)
VCore: 1.6 1.65 V
First release: September 17, 2004
Clockrate: 20002200 MHz (Sempron 3000+, Sempron 3300+)
Models for Socket 754
Paris (130 nm SOI)
L1-Cache: 64 + 64 KiB (Data + Instructions)
L2-Cache: 256 KiB, fullspeed
MMX, 3DNow!, SSE, SSE2
Enhanced Virus Protection (NX bit)
Integrated 72-bit (Single channel, ECC capable) DDR memory controller
Socket 754, 800 MHz HyperTransport
VCore: 1.4 V
First release: July 28, 2004
Clockrate: 1800 MHz (3100+)
Stepping: CG (Part No.: *AX)
Palermo (90 nm SOI)
Early models (stepping D0) are downlabeled "Oakville" mobile Athlon64
L1-Cache: 64 + 64 KiB (Data + Instructions)
L2-Cache: 128/256 KiB, fullspeed
MMX, 3DNow!, SSE, SSE2
SSE3 support on E3 and E6 steppings
AMD64 on E6 stepping
Cool'n'Quiet (Sempron 3000+ and higher)
Enhanced Virus Protection (NX bit)
Integrated 72-bit (Single channel, ECC capable) DDR memory controller
Socket 754, 800 MHz HyperTransport
VCore: 1.4 V
First release: February 2005
Clockrate: 14002000 MHz
128 KiB L2-Cache (Sempron 2600+, 3000+, 3300+)
256 KiB L2-Cache (Sempron 2500+, 2800+, 3100+, 3400+)
Steppings: D0 (Part No.: *BA), E3 (Part No.: *BO), E6 (Part No.: *BX)
Models for Socket 939
Palermo (90 nm SOI)
L1-Cache: 64 + 64 KiB (Data + Instructions)
L2-Cache: 128/256 KiB, fullspeed
MMX, 3DNow!, SSE, SSE2, SSE3, AMD64 (E6 Steppings Only), Cool'n'Quiet, NX bit
Integrated 144-bit (Dual channel, ECC capable) DDR memory controller
Socket 939, 800 MHz HyperTransport
VCore: 1.35/1.4 V
First release: October 2005
Clockrate: 18002000 MHz
128 KiB L2-Cache (Sempron 3000+, 3400+)
256 KiB L2-Cache (Sempron 3200+, 3500+)
Steppings: E3 (Part No.: *BP), E6 (Part No.: *BW)
Models for Socket AM2
Manila (90 nm SOI)
L1-Cache: 64 + 64 KiB (Data + Instructions)
L2-Cache: 128/256 KiB, fullspeed
MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit
Integrated 128-bit (Dual channel) DDR2 memory controller
Socket AM2, 800 MHz HyperTransport
VCore: 1.25/1.35/1.40 V (1.20/1.25 V for Energy Efficient SFF version)
First release: May 23, 2006
Clockrate: 16002200 MHz
128 KiB L2-Cache (Sempron 2800+, 3200+, 3500+)
256 KiB L2-Cache (Sempron 3000+, 3400+, 3600+, 3800+)
Stepping: F2 (Part No.: *CN, *CW)
Sparta (65 nm SOI)
L1-Cache: 64 + 64 KiB (Data + Instructions)
L2-Cache: 256/512 KiB, fullspeed
MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit
Integrated 128-bit (Dual channel) DDR2 memory controller
Socket AM2, 800 MHz HyperTransport
VCore: 1.20/1.40 V
First release: August 20, 2007
Clockrate: 19002300 MHz
256 KiB L2-Cache (Sempron LE-1100, LE-1150)
512 KiB L2-Cache (Sempron LE-1200, LE-1250, LE-1300)
Stepping: G1 (Part No.: *DE), G2 (Part No.: *DP)
Brisbane (65 nm SOI)
Models for Socket AM3
Sargas (45 nm SOI)
Core Speed (MHz) - 2700
Max Temps (C) 65
Wattage 45 W
L1 Cache Size (KB) 128
L2 Cache Size (KB) 1024
CPU Arch : 1 CPU - 1 Cores - 1 Threads
CPU EXT : MMX(+) 3DNow!(+) SSE SSE2 SSE3 SSE4A x86-64 AMD-V, Cool'n'Quiet, NX bit
CPUID : F.6.2 / Extended : 10.6
Core : (45 nm) / Stepping : BL-C2
Models for Socket S1 (638)
Keene (90 nm SOI)
L1-Cache: 64 + 64 KiB (Data + Instructions)
L2-Cache: 256 or 512 KiB, fullspeed
MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit
Integrated 128-bit (Dual channel) DDR2 memory controller
Socket S1, 800 MHz HyperTransport
VCore: 0.950-1.25 V
First release: May 17, 2006
Clockrate: 10002000 MHz
256 KiB L2-Cache (Sempron 2100+, 3400+)
512 KiB L2-Cache (Sempron 3200+, 3500+, 3600+)
Stepping: F2 (Part No.: *CM)
Sable (65 nm SOI)
L1-Cache: 64 + 64 KiB (Data + Instructions)
L2-Cache: 512 KiB, fullspeed
MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit
Integrated 128-bit (Dual channel) DDR2 memory controller
Socket S1, 1600 MHz HyperTransport
VCore: 0.950-1.25 V
First release: January 8, 2009
Clockrate: 20002100 MHz 25w
512 KiB L2-Cache
Models for ASB1 package (BGA)
Huron (65 nm SOI)
L1-Cache: 64 + 64 KiB (Data + Instructions)
L2-Cache: 256 KiB, fullspeed
MMX, Extended 3DNow!, SSE, SSE2, SSE3, AMD64, Cool'n'Quiet, NX bit
Integrated 128-bit (Dual channel) DDR2 memory controller
ASB1 package, 800 MHz HyperTransport
VCore: ?
First release: January 8, 2009
Clockrate: 10001500 MHz
256 KiB L2-Cache (Sempron 200U) 1000 MHz TDP 8 W
256 KiB L2-Cache (Sempron 210U) 1500 MHz TDP 15 W
Stepping: ? (Part No.: *DV)
Socket 754 32-bit Semprons
Max P-State
Model
Manufacturing Process
Part Number(OPN)
1600 MHz
2600+
0.09 micrometre
SDA2600AIO2BA(some parts are 64-bit)
1600 MHz
2800+
0.09 micrometre
SDA2800AIO3BA
1800 MHz
3000+
0.13 micrometre
SDA3000AIP2AX
1800 MHz
3100+
0.13 micrometre
SDA3100AIP3AX
1800 MHz
3100+
0.09 micrometre
SDA3100AIO3BA
2000 MHz
3300+
0.09 micrometre
SDA3300AIO2BA
Socket S1 (638) 64-bit Semprons
Max P-State
Model
Manufacturing Process
Part Number(OPN)
1000 MHz
800
0.09 micrometre
TBA
1600 MHz
3200
0.09 micrometre
SMS3200HAX4CM
1800 MHz
3400
0.09 micrometre
SMS3400HAX3CM
1800 MHz
3500
0.09 micrometre
SMS3500HAX4CM
2000 MHz
3600
0.09 micrometre
SMS3600HAX3CM
Semprons without Cool'n'Quiet
AMD has released some Sempron processors without Cool'n'Quiet support. The following table describes those processors lacking Cool'n'Quiet.
Max P-State
Min P-State
Model
Operating Mode
Package-Socket
Manufacturing Process
Part Number(OPN)
1400 MHz
N/A
2500+
32/64
Socket 754
0.09 micrometre
SDA2500AIO3BX
1600 MHz
N/A
2600+
32 or 32/64
Socket 754
0.09 micrometre
SDA2600AIO2BA
1600 MHz
N/A
2600+
32/64
Socket 754
0.09 micrometre
SDA2600AIO2BX
1600 MHz
N/A
2800+
32
Socket 754
0.09 micrometre
SDA2800AIO3BA
1600 MHz
N/A
2800+
32/64
Socket 754
0.09 micrometre
SDA2800AIO3BX
1600 MHz
N/A
2800+
32/64
Socket AM2
0.09 micrometre
SDA2800IAA2CN
1600 MHz
N/A
3000+
32/64
Socket AM2
0.09 micrometre
SDA3000IAA3CN
1600 MHz
N/A
3000+
32/64
Socket AM2
0.09 micrometre
SDA3000IAA4CN
See also
List of AMD Sempron microprocessors
References
^ AMD Sempron FAQs
External links
AMD K7 Sempron technical specifications
AMD K8 Sempron technical specifications
AMD's Desktop Sempron product page
AMD's Notebook Sempron product page
v d e
AMD processors
Discontinued
Am2900  Am29000  Am9080  Am286  Am386  Am486  Am5x86  K5  K6  K6-2  K6-III  Duron  Athlon  Mobile Athlon 64  Alchemy
Current
Geode  Sempron  Athlon 64 (Athlon Neo)  Athlon X2  Phenom (Phenom II)  Athlon II   Turion  Opteron
Future
Fusion (Bulldozer  Bobcat)
Microarchitectures
K7  K8  K9  K10
Lists
Am2900  Duron  Athlon  Athlon XP  Sempron  Athlon 64  Athlon X2  Phenom  Turion  Opteron  Future Microprocessors
Instruction sets
3DNow!  SSE4a  XOP  FMA4  CVT16
Categories: Advanced Micro Devices x86 microprocessors

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